XA-500M

XMC Module with Two 500 MSPS A/Ds, Two 615 MSPS DACs and Artix7 FPGA

xa-500m XMC Artix7 FPGA​

Overview

The XA-500M XMC card features two 14-bit, 500 MSPS A/D channels and two 16-bit, 615 MSPS DAC channels designed for high speed stimulus-response, ultrasound, and servo control applications.

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on- board programmable PLL clock source.

Key Features

AMD Artix 7

2x DAC channels
16-bit, 615 MSPS

2x ADC channels 14-bit, 500 MSPS

Block Diagram, Data Sheet and Product Details

Features

  • Two 500 MSPS, 14-bit ADC channels
  • Two 615 MSPS, 16-bit DAC channels
  • 82 dB SFDR, 68 dBFS SNR A/Ds
  • 79 dB SFDR, 58 dBFS SNR D/As
  • 2 Vpp input range
  • 2 Vpp DC coupled, 1 Vpp AC coupled output range
  • DIO on P16 (17 differential pairs)
  • Xilinx Artix-7 FPGA
  • DDR3 Memory
  • Programmable or external sample clock
  • Synchronized system sampling using
  • Common reference clock and triggers
  • Framed, software or external triggering
  • Log acquisition timing and events
  • Power management features
  • XMC Module (75×150 mm)
  • Use in any PCI Express desktop, compact PCI/PXI, PXIe, or cabled PCI Express application with optional adapter

Applications

  • Stimulus-response measurements
  • High speed servo controls
  • Arbitrary Waveform Generation
  • RADAR
  • LIDAR
  • Optical Servo
  • Medical Scanning

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Artix-7 FPGA device. Two 256Mx16 memories provide data buffering and FPGA computing memory.

The logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the- loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

The PCI Express 2.0 interface supports continuous data rates up to 3200 MB/ s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.

Interested in Pricing or More Information?

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