Two 400/500 MSPS ADC, Two 500 MSPS DAC and Virtex-6 FPGA

x6-400m FPGA card


The X6-400M XMC card integrates high speed digitizing and signal generation with signal processing on a PMC/XMC IO module with a powerful Xilinx Virtex 6 FPGA signal processing core, and high-performance PCI Express/PCI host interface.

Key Features

AMD Virtex 6

2x DAC channels
16-bit, 500 MSPS

2x ADC channels 12-bit, 400/500 MSPS

Block Diagram, Data Sheet and Product Details


  • Two 400 MSPS, 14-bit A/D channels
  • Two 500 MSPS, 16-bit D/A channels
  • Xilinx Virtex6 SX315T/SX475T or LX240T
  • 4 Banks of 1GB DRAM (4 GB total)
  • Ultra-low jitter programmable clock
  • Gen2 x8 PCI Express providing 2 GB/s sustained transfer rates
  • PMC/XMC Module (75×150 mm)
  • Conduction Cooling per VITA 20
  • Environmental Levels for -40to 85C operation, 9g RMS sine, 0.1g2/Hz random vibration
  • Adapters for VPX, Compact PCI, desktop PCI and cabled PCI Express systems


  • Wireless Receiver and Transmitter
  • LTE, WiMAX Physical Layer
  • Medical Imaging
  • High Speed Data Recording and Playback
  • IP Development

The X6-400M XMC card features two 14-bit 400MSPS or 12-bit 500 MSPS A/Ds, either AC or DC-coupled, plus two 500MSPS update rate DACs. The DAC can be used a single 1 GHz output channel. Analog IO is either AC or DC coupled. Receiver IF frequencies of up to 250 MHz are supported. The sample clock is from either a low-jitter PLL or external input. Multiple cards can be
synchronized for sampling.

A Xilinx Virtex6 LX240T (LX315T and SX475T options) with 4 banks of 1 GB DRAM provides a very high performance DSP core with over 2000 MACs (SX315T). The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates.

The X6-400M power consumption is 19W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation from -40 to 85C operation and 0.1 g2 /Hz vibration. Conformal coating is available.

The FPGA logic can be fully customized using VHDL and MATLAB using the Frame Work Logic tool set. The MATLAB BSP supports real-time hardwarein-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator. IP cores for many wireless and DSP functions such as DDC, PSK/FSK demod, OFDM receiver, correlators and large FFT are available.

Software tools for host development include C libraries and drivers for Windows, Linux and VxWorks. Application examples demonstrating the module features are provided.

Interested in Pricing or More Information?

Our technical sales team is ready to provide availability and configuration information, or answer your technical questions.