Bare Die Assembly

Innovative, Cost-effective Packaging Techniques for Mid-volume Applications

Bare Die Packaging Technologies

ISI utilizes its expertise to effectively provide space-efficient solutions and high-performance circuit integration that optimize the electrical and mechanical properties of systems. ISI has demonstrated consistent success in designing and manufacturing modules with bare dies.

Next-Level Integration

ISI’s Next-Level Integration packaging blends high-density packaging with advanced interconnect capabilities to promptly afford miniaturized solutions. These packaging techniques include:

Bare dies on any substrate, including FR4, thin board, flex, rigid flex and exotic materials
Die-attached gold-wire bonding; gold- or aluminum-wedge bonding
Overmolding/contact stamping and forming
Encapsulation/glob-top or dam-and-fill
Flip chip, including flux, high-accuracy placement, reflow and underfill
Combination of bare and packaged die-enabled reduced form factors
High-performance organic substrate vs. ceramic
Bare die assembly on flex/rigid circuits

Typical Bare Die Packaging Methods

Multi-tier Wire Bond (PBGA) Package

Flip Chip (FC-PBGA) Package

IC Packaging

Once produced, bare die can be assembled by attaching it to a substrate or “packaged” through different processes. ISI has qualified a variety of stacked bare die techniques. These processes are available for use with standard die and do not require custom die or through-silicon vias (TSV). Below are the various die-stacking methods offered for bare die assembly.