XA-RX

Eight 125 MSPS 16-Bit ADC & Artix-7 FPGA

Overview

The XA-RX XMC card features eight 16-bit, 125 MSPS A/D channels designed for high speed stimulus-response, ultrasound, and RADAR.

Key Features

AMD Artix 7

8x ADC channels
16-bit, 125 MSPS

PCI Express 2.0 XMC Module

Block Diagram, Data Sheet and Product Details

XA-RX Data Sheet

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Features

Eight 125 MSPS, 16-bit ADC channels
89 dB SFDR, 72 dBFS SNR A/Ds
3Vpp input range
DIO on P16 (19 differential pairs)
Xilinx Artix-7 FPGA
DDR3 Memory
Programmable or external sample clock
Synchronized system sampling using common reference clock and triggers
Framed, software or external triggering
Log acquisition timing and events
Power management features
PCI Express 2.0 XMC Module (75×150 mm)
Use in any PCI Express desktop, compact PCI/PXI, PXIe, or cabled PCI Express application

Applications

Stimulus-response measurements
High speed servo controls
Arbitrary Waveform Generation

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Artix-7 FPGA device. Two 256Mx16 memories provide data buffering and FPGA computing memory.

The logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

The PCI Express 2.0 interface supports continuous data rates up to 1600 MB/ s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.

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