High Density 3D Packaging

ISI is a leader in high density 3D memory packaging.  Today’s solutions draw from our 25 year history in IC packaging and over 20 issued patents

Our approach:

	Is compatible with standard, readily available semiconductor devices, no special back-end wafer level processes required
	Achieves high density packaging through a combination of several technologies: - Assembly of bare die and/or packaged memory devices - Very thin laminate substrate design and processing - Unique 3D interconnect solutions - Void-free overmold of module assemblies for improved reliability and monolithic final assemblies
	Is cost effective for low, medium, and high volume projects

Applications

	TSOP / Flash Stacking: - Converts standard TSOP 48 lead devices to a stackable package - Stackable package has same form factor as standard component (x, y & z)  - Pads on top allow for simple component stacking which can be done with standard surface mount assembly processes
	BGA PiP/PoP: - For this application, ISI embeds a standard DDR2 50 ball BGA into the base substrate to create a Package-In-Package (PiP) - A second 60 Ball BGA is assembled to the top, creating a Package-On-Package (PoP) bstrate to create a Package-In-Package (PiP) - This product allows for 36 DDR2 components to fit on a standard sized DIMM
	5 Chip Memory Module: - To meet density requirements for this application, three bare die are embedded into the base substrate - Two additional DDR chips in standard 84 ball BGAs are assembled to the top - The overall module has a 16 x 23mm footprint and 208 balls
	ISI CSP: - Memory die often have wire bond pads down the center of the die, so perimeter space for wirebonding is required in standard multi-die module modules - ISI’s Chip Scale Package (CSP) creates a memory-module building block that is only slightly larger than a bare die, allowing dense side-by-side die placement - Several CSPs can be assembled to a module substrate then overmolded to create a monolithic assembly